logic-rust.git/src, branch master Rust project to solve Computer Circuit Design course work http://140041.xyz/logic-rust.git/atom?h=master 2025-05-04T14:29:18Z feat: better way to print chip count 2025-05-04T14:29:18Z Mora Unie Youer mora_unie_youer@riseup.net 2025-05-04T14:29:18Z urn:sha1:ae99a9c5b50cf0517cf48771c99324e70d2b366b feat: show grouped solution parameters 2025-05-04T14:22:32Z Mora Unie Youer mora_unie_youer@riseup.net 2025-05-04T14:22:32Z urn:sha1:0a547d7878c941183fd479318ce4e55ee5d5dda0 feat: use larger gates if specific is not found 2025-05-02T12:53:18Z Mora Unie Youer mora_unie_youer@riseup.net 2025-05-02T12:53:18Z urn:sha1:5b659dcb8805829964e4b4226a18081a2423bb11 fix: no panic if gate has no chip 2025-05-02T12:46:11Z Mora Unie Youer mora_unie_youer@riseup.net 2025-05-02T12:46:11Z urn:sha1:21391b535e7541a9b33ed506d60920f0fa940b1d feat: D to JK trigger truth table conversion 2025-05-02T12:19:20Z Mora Unie Youer mora_unie_youer@riseup.net 2025-05-02T12:19:20Z urn:sha1:6f6fda607134a1172893bffe127ad04c6234aa65 fix: improve minimization algorithm 2025-05-02T12:18:43Z Mora Unie Youer mora_unie_youer@riseup.net 2025-05-02T12:18:43Z urn:sha1:24ffb51a4fa63cf062b6980d1f8af5330d75cdc4 fix: improve full NAND/NOR solutions 2025-05-02T12:17:42Z Mora Unie Youer mora_unie_youer@riseup.net 2025-05-02T12:17:36Z urn:sha1:82ed1c2041150ffca5512acad1080737892c9470 feat: calculation of input signal current 2025-04-28T09:35:04Z Mora Unie Youer mora_unie_youer@riseup.net 2025-04-28T09:35:04Z urn:sha1:04fab246ea5cd4c2711d81ac6ea6a7027ee22f8e feat: solution parameter calculation 2025-04-28T09:12:36Z Mora Unie Youer mora_unie_youer@riseup.net 2025-04-28T09:12:36Z urn:sha1:facb87c7f46831281885dbd143306148f5b50fba perf: minimization algorithm now a little faster 2025-04-28T07:21:50Z Mora Unie Youer mora_unie_youer@riseup.net 2025-04-28T07:21:50Z urn:sha1:328c73a9b176e449f0a5d4f35715865710eaa3c9